D-Wave's Nature paper shows a 99.9% fidelity two-qubit gate, targeting 10x error reduction per correction increment.
D-Wave's Nature paper shows a 99.9% fidelity two-qubit gate, targeting 10x error reduction per correction increment.

D-Wave Quantum's dual-rail architecture achieved 99.9% fidelity on a two-qubit gate in a Nature study, targeting 10x error reduction per correction increment toward fault-tolerant computing.
"Gate-model quantum computing's greatest remaining challenge is not simply building more qubits. It is building systems that can correct errors efficiently as they scale," Dr. Alan Baratz, CEO of D-Wave, said. "Superconducting quantum computers are known for speed, but achieving the high fidelity needed for scalable, fault-tolerant systems has remained a challenge."
The paper, "An entangling gate for dual-rail erasure qubits," reports approximately 99.9% fidelity during two-qubit operations with gate times of about 500 nanoseconds. D-Wave simulations indicate the architecture could reduce logical error rates by a factor of 10 per error-correction increment — a metric the company calls Lambda. The company's roadmap targets a 100-logical-qubit system by 2032 capable of more than 1 million operations.
The results position D-Wave against IBM, Google, and IonQ in the race to fault-tolerant quantum computing. D-Wave's approach uses hardware-level error detection to reduce the physical qubit overhead that rivals require, potentially lowering the cost and engineering complexity of building commercial quantum systems.
Quantum information is inherently fragile, and correcting errors in most gate-model architectures requires large numbers of additional physical qubits and operations. IBM's surface-code approach, for example, typically requires hundreds of physical qubits to encode a single logical qubit, while Google's error-correction demonstrations have similarly relied on substantial qubit overhead. D-Wave's dual-rail design creates a favorable error hierarchy in which the most common quantum errors are also the easiest to correct, reducing the number of physical qubits needed for each logical qubit.
The dual-rail architecture encodes each qubit across two superconducting resonators, allowing errors to be detected at the hardware level rather than through complex software-based syndrome measurements. This built-in error detection is what enables the favorable error hierarchy — when an error occurs, it is immediately flagged as an erasure, which is simpler to correct than a generic quantum error.
Dr. Robert Schoelkopf, chief scientist at D-Wave, said the entangling gate is already integrated into the company's gate-model systems, delivering comparable performance. "We believe these results provide strong evidence that the core architectural principles underpinning our gate-model development roadmap can deliver the speed, fidelity and error-correction efficiency required for practical, fault-tolerant quantum computing," he said.
The Lambda metric is central to D-Wave's competitive positioning. A Lambda of 10 means the system becomes 10 times more reliable with each increment in error correction, making it possible to achieve low logical error rates with far fewer physical qubits. The company's integrated cryogenic control technology further reduces the classical hardware overhead typically required for error detection and correction.
D-Wave's dual-platform strategy — offering both annealing and gate-model systems — differentiates it from pure-play gate-model competitors. The company's annealing systems are already commercially deployed, with its Leap quantum cloud service reporting 99.9% availability and more than 100 organizations across commercial, government, and research sectors using its systems. The gate-model research published in Nature advances the second pillar of this strategy, targeting the broader range of computational problems that require universal quantum computing.
The Nature publication adds scientific credibility to D-Wave's technical claims, which could matter for enterprise adoption and government contracts. The company's gate-model roadmap, targeting completion of a 100-logical-qubit system by 2032, represents a multi-year development cycle that will require sustained capital investment. For investors, the key question is whether D-Wave can convert this scientific momentum into commercial revenue before competitors such as IBM and Google bring their own fault-tolerant systems to market.
Dr. Trevor Lanting, chief development officer at D-Wave, framed the research as one of several foundational capabilities needed for fault-tolerant computing. "This research demonstrates one of the foundational capabilities of our dual-rail architecture and brings us an important step closer to fault-tolerant gate-model quantum computing," he said.
This article is for informational purposes only and does not constitute investment advice.